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Memristor fabrication

JT Jianshi Tang

Last updated date: Nov 12, 2020 Views: 821 Forks: 0

original An abbreviated version of this protocol was published in Science Advances
Multichannel parallel processing of neural signals in memristor arrays
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For the fabrication of memristor array with one-transistor-one-resistor (1T1R) unit cell, the transistors and peripheral circuits were first fabricated in a commercial foundry with 130nm CMOS process. The foundry process stopped at the patterning of TiN, which served as bottom electrodes for memristors. After that, the following process was used to finish the memristor fabrication:

1.     Removing surface oxide on TiN by dilute hydrofluoric acid.

2.     Depositing 8nm HfOx layer by atomic layer deposition.

3.     Depositing 40-60 nm TaOy layer by reactive sputtering.

4.     Depositing 20nm TiN layer as top electrodes by sputtering.

5.     Depositing 200-500nm Al layer as interconnected wires and pads by sputtering.

6.     Patterning interconnected wires and pads by photolithography.

7.     Dry etching the Al/TiN/TaOy/HfOx stack with Cl2/BCl3 plasma.

8.     Removing photoresist.


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How to cite：
Readers should cite both the Bio-protocol preprint and the original research article where this protocol was used:
  1. Tang, J(2020). Memristor fabrication. Bio-protocol Preprint. bio-protocol.org/prep623.
  2. Liu, Z., Tang, J., Gao, B., Li, X., Yao, P., Lin, Y., Liu, D., Hong, B., Qian, H. and Wu, H.(2020). Multichannel parallel processing of neural signals in memristor arrays . Science Advances 6(41). DOI: 10.1126/sciadv.abc4797

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